The present invention relates to a DC-DC converter, and more particularly, to duty control of an output transistor for a DC-DC converter.
FIG. 1 is a circuit diagram showing a conventional step up type DC-DC converter 50 configured in accordance with a pulse width modulation (PWM) system. The DC-DC converter 50 includes a DC-DC converter circuit 51, which generates an output voltage Vout by pulling up a DC input voltage Vin. The DC-DC converter circuit 51 includes an output transistor M1, which is preferably an NMOS transistor, a reactor L1, a diode D1, and a capacitor C1. The DC input voltage Vin is applied to the drain of the output transistor M1 via the reactor L1. The source of the output transistor M1 is connected to the ground. The anode of the diode D1 is connected to the drain of the output transistor M1. The cathode of the diode D1 is connected to an output terminal Po of the DC-DC converter 50. The capacitor C1 is connected between the output terminal Po and the ground.
The output transistor M1 is controlled to go ON and OFF so that the output voltage Vout output from the output terminal Po is higher than the input voltage Vin. The output voltage Vout is controlled by adjusting the ratio between the ON time Ton and the OFF time Toff of the output transistor M1.
The output voltage Vout relative to the input voltage Vin is expressed by the equation of: ##EQU1##
In the equation, Doff represents the OFF duty ratio and is the inverse of (Ton+Toff)/Toff, or Toff/(Ton+Toff).
When the condition of Doff+Don=1 (Don is the ON duty ratio) is satisfied, the output voltage Vout is expressed by the equation of: ##EQU2##
The DC-DC converter 50 further includes an output voltage detection circuit 52 and a control circuit 53. The output voltage detection circuit 52 has detection resistors R1, R2. The detection resistors R1, R2 are connected in series between the output terminal Po and the ground. The detection resistors R1, R2 divide the output voltage Vout to provide a divisional voltage (detection voltage) VF to the control circuit 53.
The control circuit 53 has an error amplifying circuit 54, a reference voltage setting circuit 55, a triangular waveform oscillation circuit 56, a dead time circuit 57, a PWM comparator 58, and an output buffer 59.
The error amplifying circuit 54 compares the detection voltage VF with a predetermined reference voltage Vref output from the reference voltage setting circuit 55. The resulting differential voltage is amplified to form an error output voltage Vfb and provided to the PWM comparator 58 (refer to FIGS. 2(a) and 2(b)).
The triangular waveform oscillation circuit 56 provides a triangular waveform signal Vct, which oscillates within a predetermined voltage range, to the PWM comparator 58. The dead time circuit 57 provides a maximum duty setting voltage Vk2 to the PWM comparator 58. The maximum duty setting voltage Vk2 is the voltage that determines the maximum ON duty ratio of the output transistor M1.
The PWM comparator 58 compares the smaller one of the error output voltage Vfb and the maximum duty setting voltage Vk2 with the triangular waveform signal Vct. Under normal conditions, the PWM comparator 58 compares the error output voltage Vfb with the triangular waveform signal Vct since the error output voltage Vfb is smaller than the maximum duty setting voltage Vk2. Referring to FIG. 2(a), the PWM comparator 58 generates a high output signal CT when the triangular waveform signal Vct is less than the error output voltage Vfb and generates a low output signal CT when the triangular waveform signal Vct is greater than the error output voltage Vfb.
The ON duty ratio Don (Ton/(Ton+Toff)) increases as the error output voltage Vfb increases (i.e., as the output voltage Vout becomes lower than the predetermined set voltage). In other words, the period during which the output signal CT is high (ON time Ton) becomes longer than the period of which the output signal CT is low (OFF time Toff). On the other hand, the ON duty ratio Don (Ton/(Ton+Toff)) decreases as the error output voltage Vfb decreases (i.e., as the output voltage Vout becomes greater than the predetermined set voltage). In other words, the low period of the output signal CT (OFF time Toff) becomes longer than the high period of the output signal CT (ON time Ton).
If the error output voltage Vfb is greater than the maximum duty set voltage Vk2 as shown in FIG. 2(b), the PWM comparator 58 compares the maximum duty set voltage Vk2 and the triangular waveform signal Vct. The high period of the output signal CT (ON time Ton) is limited to a maximum time, which is less than 100% (e.g., 80%), when the error output voltage Vfb is greater than the maximum duty setting voltage Vk2. This is because the output transistor M1 remains activated when the OFF period is null. Under such condition, the DC-DC converter circuit 51 does not function. The maximum duty setting voltage Vk2 is thus set so that the OFF period Toff is not nullified. In other words, the maximum ON duty ratio Don (maximum ON duty ratio Dmax) is determined by the maximum duty setting voltage Vk2.
The output signal CT of the PWM comparator CT is applied to the gate of the output transistor M1 via the output buffer 59. The output transistor M1 is activated by a high output signal CT and deactivated by a low output signal CT.
A larger maximum ON duty ratio Dmax is preferable since the set voltage range of the output voltage Vout and the operational range of the DC-DC converter can be widened. Accordingly, it is preferred that the maximum duty setting voltage Vk2 be as close as possible to the maximum value of the triangular waveform signal Vct.
However, fluctuations in the triangular waveform signal Vct or the effects of an input offset voltage of the PWM comparator 58 may cause the maximum duty setting voltage Vk2 to be greater than the maximum voltage of the triangular waveform signal Vct. The maximum ON duty ratio Dmax is thus set at a relatively small value taking the fluctuations and input offset voltage into consideration. Accordingly, a relatively large maximum ON duty ratio Dmax cannot be obtained and the output voltage Vout cannot be increased. Further, if the maximum ON duty ratio Dmax is small, the same output voltage Vout cannot be obtained even if the input voltage Vin is decreased. Therefore, the output voltage Vout cannot be obtained from the DC-DC converter by using a battery.